ATSAM3S-EK【PDF 11/50 页】KIT EVAL FOR ATSAM3S4C

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Evaluation Kit Hardware

The SAM3S features an External Bus Interface (EBI) that permits interfacing to a broad range of external

memories and virtually to any parallel peripheral. The SAM3S-EK board is equipped with a memory

device connected to the SAM3 EBI:

One NAND Flash MT29F2G08AADWP.

Figure 4-2.

NAND Flash

{ 3 ,5,7}

PC[0.. 3 1]

+ 3 V 3

+ 3 V 3

R15

47K

R16

47K

MN 3

MT29F2G0 8 AADWP

+ 3 V 3

PC17

PC16

PC9

PC10

JP9

PC14

PC1 8 R19

R21 47K

0R

R22

DNP

DGND

16

17

8

1 8

9

7

19

1

2

3

4

5

6

10

11

14

15

20

21

22

2 3

24

25

26

CLE

ALE

RE

WE

CE

R/B

WP

N.C1

N.C2

N.C 3

N.C4

N.C5

N.C6

N.C7

N.C 8

N.C9

N.C10

N.C11

N.C12

N.C1 3

N.C14

N.C15

N.C16

N.C17

I/O0

I/O1

I/O2

I/O 3

I/O4

I/O5

I/O6

I/O7

N.C2 8

N.C27

N.C26

N.C25

N.C24

N.C2 3

PRE

N.C22

N.C21

N.C20

N.C19

N.C1 8

VCC

VCC

V SS

V SS

29

3 0

3 1

3 2

41

42

4 3

44

4 8

47

46

45

40

3 9

38

3 5

3 4

33

2 8

27

3 7

12

3 6

1 3

PC0

PC1

PC2

PC 3

PC4

PC5

PC6

PC7

C27

100nF

+ 3 V 3

C2 8 C29

100nF 1 u F

DGND

NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can

disconnect it from the on-board memories, thereby letting NCS0 free for other custom purpose.

4.3.3

Clock Circuitry

The clock generator of a SAM3S microcontroller is made up of:

A Low Power 32.768 Hz Slow Clock Oscillator with bypass mode.

A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB).

A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4 (default

value), 8 or 12 MHz.

A 60 to 130 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller.

A 60 to 130 MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and

to the peripherals. The input frequency of PLLA is from 7.5 and 20 MHz.

The SAM3S-EK board is equipped with one 12 MHz crystal, optional Piezoelectric Ceramic Resonator

12 Mhz (Murata ref. CSTCE12M0G15L99-R0), one 32.768 Hz crystal and an external clock input con-

nector (optional, not populated by default).

Figure 4-3.

NOT POPULATED

External Clock Source

2

J1

1

3

R1

DNP

C 3

20pF

R11

0R

XIN 3 2

4

5

R2

49.9R 1%

R 3

DNP

MN1

3

Y 3

3 2.76 8 KHz

DGND

C1

20pF

R4

0R

XIN

DGND

XOUT 3 2

DGND

3

DGND

Y1

DNP

R7

DNP

DGND

C2

Y2

20pF

12MHz

R5

0R

PB9

PB 8

R6

R 8

DNP

XOUT

DNP

97

96

PB9_XIN

AT91 S AM 3S

PA7_RT S 0_PWMH 3

PB 8 _XOUT

PA 8 _CT S 0_AD12BTRG

49

4 8

C4

20pF

XIN 3 2 R9

XOUT 3 2 R10

DNP

DNP

R12

0R

PA7

PA 8

SAM3S-EK Development Board User Guide

4-3

11031C–ATARM–30-Mar-11

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